This chapter describes the function and physical components of the C–brick in the following sections:
The C–brick provides the computing functionality for the SGI Origin 3000 server series since it contains the processors and memory; this brick is also referred to as a compute node.
The following lists and describes the C–brick's internal components and front panel items (Figure 4-1 shows the C–brick's front panel items):
Internal components:
IP35 Motherboard. Contains internal components such as the L1 controller logic, bedrock application-specific integrated circuit (ASIC), the processor integrated memory modules (PIMMs), and the dual-inline memory modules (DIMMs).
PIMMs. Location in which the CPUs (processors) are physically located. Each PIMM contains two processors; each C–brick can contain one or two PIMMs (two or four processors).
DIMMs. Are the dual-inline memory modules for the server.
Bedrock ASIC. Is a crossbar switch that allows communication between the processors, memory, network routers, and I/O devices.
Front panel items:
Fans.
L1 controller display. A liquid crystal display (LCD) for the L1 controller.
On/Off switch with LED. Press this button to turn on the C–brick internal components. Alternatively, you can turn on the C–brick internal components at a system console. If your system has an L2 controller, you can turn on the C–brick internal components at the L2 controller touch display.
L1 controller switches and LEDs:
On/Off switch LED. Lights green when the C–brick internal components are on and turns off when they are off.
Service required LED. Lights orange to indicate that an item is broken or not operating properly (for example, a fan is off), but the C–brick is still operating.
Failure LED. Lights red to indicate that a system failure has occurred and the C–brick system is down.
Reset switch. Press this switch to reset the C–brick internal processors and ASICs. The reset will cause a memory loss. (See the non-maskable interrupt [NMI] to perform a reset without losing memory.)
Non-maskable interrupt [NMI] switch. Press this switch to reset the C–brick internal processors and ASICs without losing memory.
The half-panel IP35 motherboard houses these components:
L1 controller logic.
One or two processor integrated memory modules (PIMMs), each with two processors (8-MB L2 cache per processor).
Eight dual-inline memory module (DIMM) slots that are organized in banks, with each bank divided between two DIMMs with up to four banks and eight DIMMs total (configurable from 512 MB to 8 GB of main memory). Memory is increased or decreased in two DIMM increments.
Bedrock memory controller. The bedrock also controls all activity within the C–brick (for example, error correction and cache coherency).
Serial ID EEPROM that contains component information.
Three 2.5 VDC, 30 A VRMs (VRMs 4, 3, and 8) that convert the incoming 48 VDC to the voltage levels required by the components.
Four 240-pin PIMM connectors.
10 light-emitting diodes (LEDs) on the C–brick rear panel.
One 12 VDC LED, which lights when L1 controller is powered on, and one 48 VDC LED, which lights when internal components are powered on
Two NUMAlink3 LEDs, controlled by the L1 controller
Two Crosstown2 LEDs, controlled by the L1 controller
Four heartbeat LEDs, controlled by the hub ASIC
The following switch and connectors on the C–brick rear panel.
Power switch
PWR (power) connector
LINK (NI - Network Interface) connector
XIO (II - I/O Interface) connector
Console port (serial)
L1 Port (USB)
Note: Ports and LEDs on the C–brick rear panel are discussed in detail in “Switch, Connectors, and LEDs on C–brick Rear Panel”.
The processors are physically located on processor integrated memory modules (PIMMs). Each C–brick can contain one or two PIMMs (two or four processors).
Each PIMM contains:
Two processors.
8 MB of secondary cache per processor: synchronous static random access memory (SSRAM).
To reduce memory latency, a processor has access to two 32-KB primary caches (one for data and one for instructions) and an off-chip secondary cache. The primary caches are located within the processor for fast, low-latency access of instructions and data.
Each C–brick has from 512 MB to 8 GB of local memory, which includes main memory and directory memory for cache coherence.
Local memory can consist of 1 to 4 banks. Each bank consists of two dual-inline memory modules (DIMMs) that contain double data rate synchronous dynamic random access memory (DDR SDRAM chips). Memory is increased or decreased in two-DIMM increments only.
| Note: SGI Origin 3000 server series DIMMs are not compatible with the DIMMs used in Origin 200, Origin 2000, Onyx2, or Octane systems. |
Two types of DIMMs that make up a bank must be the same memory size; however, each pair of DIMMs in a C–brick can be a different memory size.
The SGI Origin 3000 series servers support four types of memory kits:
512-MB kit with integrated directory memory. Main memory for all server systems with less than 128 processors.
1-GB kit with integrated directory memory. Main memory for all server systems with less than 128 processors.
1-GB kit with premium integrated directory memory. Memory required for server systems over 128 processors; however, this memory can also be used in server systems with fewer than 128 processors. These DIMMs contain one additional memory chip to provide additional directory memory for building configurations with more than 128 processors.
2-GB kit with premium integrated directory memory. Memory required for server systems with more than 128 processors, but can also be used for server systems with fewer than 128 processors.
Note: For cost reasons, if you plan to upgrade your site to more than 128 processors, use only DIMMs with premium integrated directory memory.
Table 4-1 outlines main memory sizes. This table does not cover systems that have multiple-size memory banks.
Table 4-1. Main Memory DIMM Sizes
Memory Kit | Single DIMM Size | DRAM Technology |
|---|---|---|
512 MB with integrated directory memory | 256 MB | 128 Mbits |
1 GB with integrated directory memory | 512 MB | 128 Mbits |
1 GB with premium integrated directory memory | 512 MB | 128 Mbits |
2 GB with premium integrated directory memory | 1 GB | 256 Mbits |
Every C–brick has an L1 system controller. The L1 controller monitors and controls the environment of the C–brick (for example, fan speed, operating temperature, voltage margins, and system LEDs). The L1 controller also reads component information from serial ID EEPROMs, provides a system console connection, and interfaces with its own 2-line x 12-character liquid crystal display (LCD) at the front of the brick.
The L1 controller in the IP35 C–brick transfers status and control information to three types of external devices: system console computer, L1 controller in another brick, and L2 controller.
The L1 controller consists of the display, logic components, and internal display cable. The logic components are located on the IP35 motherboard; the internal cable connects the display to the logic components.
For general information about the L1 controller, see Chapter 3, “System Control ” of this guide.
The C–brick L1 controller communicates with the L1 controller in an I/O–brick (X–, I–, or P–brick) through the XIO (II - I/O interface) connector on the back of the C–brick (see Figure 4-2).
In the SGI Origin 3200, which has no R–brick, the L1 controller in a C–brick can communicate with the L1 controller in another C–brick through the link (NI - Network Interface) connector.
In SGI Origin 3400 or SGI Origin 3800 servers, which have R–bricks, the C–brick L1 communicates to the R–brick through the LINK (NI) connector on the back of the C–brick. This connector, which provides USB protocol signals, connects to one of the R–brick connectors labeled R TO R or C TO R (2, 3, 4, and 5) to communicate with the USB hub residing inside the R–brick and its L1.
How the L1 and L2 controller connect and communicate with each other is determined by which SGI Origin 3000 series server you have. The C–brick connectors located on its rear panel (see Figure 4-2) are central to making these connections.
If the SGI Origin 3200, which has no R–brick, has an L2 controller (optional with the SGI Origin 3200), the L1 controller in a C–brick can communicate with an L2 controller through the C–brick L1 port connector. This connector provides universal serial bus (USB) protocol signals to communicate with the L2 controller.
In the SGI Origin 3400 and 3800, the L1 controller in a C–brick communicates with an L2 controller that is connected to an R–brick, to which the C–brick is connected. The C–brick's L1 communicates to the R–brick through the LINK (NI) connector on the back of the C–brick. This connector, which provides USB protocol signals, connects to one of the R–brick connectors labeled R TO R or C TO R (2, 3, 4, and 5) to communicate with the USB hub residing inside the R–brick.
For SGI Origin 3200 servers, which do not have R–bricks, and do not have an L2 controller, connect a dumb terminal, as system console, to the C–brick Console connector.
In larger system configurations such as the SGI Origin 3400 and SGI Origin 3800 servers, which have an R–brick and an L2 controller, connect the system console to the L2 controller. The individual brick L1 controllers connect to the USB hub in the R–brick, which is in turn connected to the USB connector on the L2 controller. The L2 controller enables you to monitor and manage the activities of all the L1 controllers in the rack and other rack items.
You can connect an SGIconsole to the L2 controller Ethernet port through an Ethernet hub. As an alternative, you can connect a dumb terminal to the L2 controller console port. For details about connecting a system console to an SGI Origin 3000 series server, see “Connecting a Console to Your Server System” in Chapter 2.
Figure 4-2 shows the location of the power-on switch, connectors, and LEDs on the C–brick rear panel.
The C-brick has the following items on the rear panel:
Power switch. Move the power switch to the 1 position to power on the C–brick's L1 controller, and to the 0 position to power off the C–brick's L1 controller. Powering on the L1 controller lights the 12VDC LED green.
PWR (power) connector. Connects the connector to the power bay, which gives power to the C-brick.
48 VDC and 12 VDC LEDs. The power switch must be in the ON (1) position for these LEDs to be on. The 12 VDC lights green when the L1 controller is powered on and operating, and the 48 VDC lights green when the rest of the C–brick internal components are powered on and operating. The internal components are powered on by pressing the On/Off switch (brick reset button) located on the L1 controller panel.
LINK (NI - Network Interface) connector. This connector connects the C–brick to an R–brick or to another C–brick if the system does not have an R–brick, such the SGI Origin 3200 server. This connection is made with a NUMAlink™3 cable at 1.6 GB/sec in each direction.
XIO (II - I/O Interface) connector. This connector connects a C–brick to an I/O–brick (I–brick, P–brick, or X–brick); this connection occurs via a NUMAlink™3 cable at 1.2 GB/sec in each direction.
Console connector. This is a DB-9 RS-232 port (console and diagnostic port) connector that connects the C–brick's L1 controller to a system console. The C–brick L1 controller communicates with a system console through the console connector, which provides a serial bus that uses standard RS-232 protocol.
L1 port connector. This universal serial bus (USB) connector connects the C–brick's L1 controller to the L2 controller on the rack enclosure for systems with no router.
Table 4-2 summarizes the function of the C–brick connectors.
Table 4-2. C–brick Port Connectors and LEDs
Label on Panel | Connector | Purpose | LED |
|---|---|---|---|
PWR |
| Inputs power from the power bay. |
|
48 VDC | N/A | The 12 VDC LED lights green, indicating the L1 controller is on, when the power switch on the brick has been turned to the On (1) position. The 48 VDC LED lights green, indicating all other C-brick internals are on, after the switch has been turned on and the On/Off switch (brick reset button) on the L1 controller has been turned on. Alternatively, the L1 controller and the rest of the C–brick internals can be turned on and off from the system console. | 2 (1 for 48 VDC and 1 for 12 VDC) |
LINK (NI) | NUMAlink3 | Connects the C–brick to an R–brick or to another C–brick (if the system does not have an R–brick); 1.6 GB/sec each direction. | 2 |
XIO (II) | Crosstown2 | Connects the C–brick to an I–brick, P–brick, or X–brick; 1.2 GB/sec each direction. | 2 |
Console | DB-9 | Connects the C–brick to a system console. | None |
L1 Port | Series A | For systems with no router, this port connects directly to a USB connector on the L2 controller. | None |
DB CA | N/A | Status of the processors in the C–brick. A C–brick can have up to four processors (two processors per PIMM). | 4 (1 per processor [A, B, C, D]) |
The following LEDs are located on the C–brick rear panel:
One 12 VDC LED and one 48 VDC LED.
Two LINK (NI) NUMAlink3 connector LEDs, controlled by the L1 controller.
Two XIO (II) Crosstown2 connector LEDs, controlled by the L1 controller.
Four heartbeat LEDs (one for each processor; two processors per PIMM) controlled by the hub ASIC.
Table 4-3 summarizes what the rear panel LEDs indicate.
Table 4-3. C–brick Rear Panel LEDs
Label on Panel | Quantity | Purpose |
|---|---|---|
12 VDC | 1 | LED lights green when L1 controller is on. LED not lit indicates L1 controller is off. L1 controller is turned on by turning on the power switch. |
48 VDC | 1 | LED lights green when all C-brick internal items besides L1 controller are on. LED not lit indicates C–brick internal items, besides L1 controller, are off. Internal devices are turned on by turning on the power switch and pressing the On/Off switch (brick reset button). |
LINK (NI) | 2 | LEDs light yellow when the connector is cabled securely to an R–brick or another C–brick. LEDs light green when connection is negotiated with the R–brick or C–brick with which the connector is cabled. |
XIO (II) | 2 | LEDs light yellow when connector is cabled securely to an I/O device. LEDs light green when connection is negotiated with the I/O device with which the connector is cabled. |
DB | 4 | Heartbeat LEDs for processors on PIMMs (one LED per processor [A, B, C, and D]; each PIMM has two processors). |