- access time
- System Latency
- address space
- in a Node's memory
- Distributed Shared-Memory
- Origin2000 system
- Distributed Shared Address Space (Memory and I/O)
- architecture
- load/store
- Load/Store Architecture
- bandwidth
- bisection
- System Bandwidth
- System Bandwidth
- Origin2000 system
- System Bandwidth
- peak
- System Bandwidth
- System Bandwidth
- peripheral
- System Bandwidth
- sustained
- System Bandwidth
- System Bandwidth
- BaseIO board
- description
- BaseIO Board
- BaseIO-G board
- BaseIO Board
- MediaIO (MIO) Board
- bisection bandwidth
- System Bandwidth
- System Bandwidth
- in Origin2000 system
- Scalability and Modularity
- bit vectors
- as used in coherence
- Directory-Based Coherence
- Block Transfer Engine (BTE)
- Page Migration and Replication
- blocks
- as used in memory
- Memory Blocks, Lines, and Pages
- memory
- Distributed Shared-Memory
- Bridge ASIC
- Origin Family ASICs
- XIO link
- Bridge ASIC
- BTE, Block Transfer Engine
- Page Migration and Replication
- Busy
- directory state
- Directory States
- cache
- coherence
- description of
- Cache-Coherence Protocol
- in Origin2000 system
- What Makes the Origin2000 System Different
- hit
- Hits, Misses, and Page Faults
- in the Origin2000 system
- Origin2000 Memory Hierarchy
- memory hierarchy
- Origin2000 Memory Hierarchy
- Origin2000 Memory Hierarchy
- clock, global
- Global Real-time Clock
- coherence
- as it uses invalidation
- Maintaining Coherence Through Invalidation
- bit vectors
- Directory-Based Coherence
- directory entry
- Directory-Based Coherence
- directory-based
- Cache-Coherence Protocol
- hardware
- Why Coherence is Implemented in Hardware
- snoopy-based
- Cache-Coherence Protocol
- state bits
- Directory-Based Coherence
- consistency, sequential
- Memory Consistency
- CrayLink Interconnect
- Origin2000 system
- CrayLink Interconnect
- crossbar
- Crossbow ASIC
- Crossbow (XBOW) ASIC
- Origin2000 system
- System Interconnections
- Crossbar
- Router ASIC
- Router Crossbar
- Router board
- Router Board
- Crossbow ASIC
- Crossbow Expansion
- Origin Family ASICs
- Crossbow (XBOW) ASIC
- configuration
- Crossbow Configuration
- connections
- Origin2000
- crossbar
- Crossbow (XBOW) ASIC
- I/O Ports
- Crossbow (XBOW) ASIC
- Origin2000 system
- XIO and Crossbow (XBOW)
- widget
- Crossbow (XBOW) ASIC
- Crosstown board
- description
- Crosstown Board
- Crosstown protocol
- XIO Devices — Widgets
- cycle time
- System Latency
- STL
- SGI Transistor Logic (STL)
- DAMQ, Dynamically Allocated Memory Queue
- Router Receiver and Sender
- daughterboard, Origin200
- Origin200
- devices, XIO
- XIO Protocol and Devices
- DIMM
- (dual in-line memory module)
- Distributed Shared-Memory
- directory entry
- Cache-Coherence Protocol
- directory memory
- Distributed Shared-Memory
- configuration
- Memory Specifications
- Origin2000 system
- Directory Memory
- directory poisoning
- Directory Poisoning
- directory states
- Busy
- Directory States
- Exclusive
- Directory States
- Poisoned
- Directory States
- Shared
- Directory States
- Unowned
- Directory States
- directory-based coherence protocol
- Directory-Based Coherence
- Cache-Coherence Protocol
- distributed I/O
- Distributed I/O
- distributed shared-memory (DSM)
- Distributed Shared-Memory
- as used in Origin2000 system
- What Makes the Origin2000 System Different
- DSM
- (distributed shared-memory)
- Distributed Shared-Memory
- dual in-line memory module (DIMM)
- Distributed Shared-Memory
- Dynamically Allocated Memory Queue (DAMQ)
- Router Receiver and Sender
- Exclusive
- directory state
- Directory States
- Cache-Coherence Protocol
- Express Links
- Xpress Links
- extended directory memory
- Distributed Shared-Memory
- fault in memory
- Hits, Misses, and Page Faults
- hardware coherence
- Why Coherence is Implemented in Hardware
- HIMM
- (horizontal in-line memory module)
- Processors and Cache
- Node board
- Processors and Cache
- hit in cache
- Hits, Misses, and Page Faults
- home memory
- in the Origin2000 system
- Origin2000 Memory Hierarchy
- memory hierarchy
- Origin2000 Memory Hierarchy
- horizontal in-line memory module (HIMM)
- Processors and Cache
- Hub ASIC
- Origin Family ASICs
- cache coherence
- Cache Coherence
- description
- Node Board
- Hub ASIC and Interfaces
- in the Origin2000 system
- Hub
- interfaces
- Hub Interfaces
- intranode communications
- Hub Interfaces
- I/O
- Bridge ASIC
- Bridge ASIC
- Crossbow ASIC
- Crossbow (XBOW) ASIC
- distributed
- Distributed I/O
- in the Origin2000 system
- I/O Controllers
- Node board
- I/O
- statically-partitioned with HUB ASIC
- Static Partitioning of I/O
- indexing
- as used in memory
- Memory Blocks, Lines, and Pages
- interconnection fabric
- Overview of the Origin Family Architecture
- Interconnection Fabric
- parallel datapaths
- Overview of the Origin Family Architecture
- performance versus a bus
- Overview of the Origin Family Architecture
- system interconnections
- What Makes the Origin2000 System Different
- invalidation
- as used in coherence
- Maintaining Coherence Through Invalidation
- IOC3 ASIC
- Origin Family ASICs
- IOC3 ASIC
- latency
- access time
- System Latency
- cycle time
- System Latency
- memory
- System Latency
- system
- System Latency
- LINC ASIC
- LINC ASIC
- line
- as used in memory
- Memory Blocks, Lines, and Pages
- link level protocol (LLP)
- Link-Level Protocol (LLP)
- load/store architecture
- Load/Store Architecture
- local memory
- Distributed Shared-Memory
- Origin2000 Memory Hierarchy
- locality
- of reference
- Locality: Spatial and Temporal
- spatial
- Locality: Spatial and Temporal
- temporal
- Locality: Spatial and Temporal
- mapping
- memory
- Virtual Memory
- maximum configuration
- Origin200 system
- Origin200
- Origin2000 system
- Scalability and Modularity
- MediaIO board
- description
- MediaIO (MIO) Board
- memory
- access time
- System Latency
- address space
- Distributed Shared-Memory
- blocks
- Memory Blocks, Lines, and Pages
- Distributed Shared-Memory
- consistency
- Memory Consistency
- cycle time
- System Latency
- directory
- Memory Specifications
- Distributed Shared-Memory
- distributed shared-
- Distributed Shared-Memory
- extended directory
- Distributed Shared-Memory
- in the Origin2000 system
- Memory
- indexing
- Memory Blocks, Lines, and Pages
- latency
- System Latency
- line
- Memory Blocks, Lines, and Pages
- local
- Distributed Shared-Memory
- mapping
- Virtual Memory
- Origin200
- Origin200
- page fault
- Hits, Misses, and Page Faults
- page table
- Virtual Memory
- page table entry
- Virtual Memory
- pages
- Distributed Shared-Memory
- Memory Blocks, Lines, and Pages
- read cycle
- Sample Read Traversal of Memory
- remote
- Distributed Shared-Memory
- slots, number of
- Memory Specifications
- virtual
- Virtual Memory
- write cycle
- Sample Write Traversal of the Memory Hierarchy
- memory hierarchy
- Origin2000 Memory Hierarchy
- Origin2000 Memory Hierarchy
- cache
- Origin2000 Memory Hierarchy
- Origin2000 Memory Hierarchy
- home memory
- Origin2000 Memory Hierarchy
- in the Origin2000 system
- Origin2000 Memory Hierarchy
- local memory
- Origin2000 Memory Hierarchy
- processor registers
- Origin2000 Memory Hierarchy
- remote caches
- Origin2000 Memory Hierarchy
- Meta Router
- Types of Router Boards
- Midplane board
- description
- Midplane Board
- migration, page
- Page Migration and Replication
- modularity
- Overview of the Origin Family Architecture
- Origin2000 system
- What Makes the Origin2000 System Different
- Scalability and Modularity
- motherboard, Origin200
- Origin200
- Node board
- block diagram
- Node Board
- cache
- Processors and Cache
- description
- Node Board
- global clock
- Global Real-time Clock
- HIMM
- Processors and Cache
- Hub ASIC
- Hub ASIC and Interfaces
- I/O
- I/O
- in the Origin2000 system
- Origin2000
- memory
- Distributed Shared-Memory
- physical connections
- Node Board Physical Connections
- processors
- Processors and Cache
- Null Router
- Types of Router Boards
- Origin200 system
- daughterboard
- Origin200 Mother and Daughter Boards
- Origin200
- maximum configuration
- Origin200
- memory
- Origin200
- motherboard
- Origin200 Mother and Daughter Boards
- motherboard
- Origin200
- overview
- Origin200
- PCI expansion slots
- Origin200
- R10000 processors
- Origin200
- what the system consists of
- Overview of the Origin Family Architecture
- Origin2000 system
- address space
- Distributed Shared Address Space (Memory and I/O)
- bandwidth
- System Bandwidth
- BaseIO board
- BaseIO Board
- bisection bandwidth
- Scalability and Modularity
- cache
- Origin2000 Memory Hierarchy
- cache coherence
- What Makes the Origin2000 System Different
- CrayLink Interconnect
- CrayLink Interconnect
- crossbar
- System Interconnections
- Crossbar
- Crossbow
- XIO and Crossbow (XBOW)
- connections
- Origin2000
- Crosstown board
- Crosstown Board
- directory coherence protocol
- What Makes the Origin2000 System Different
- directory memory
- Directory Memory
- distributed shared-memory
- What Makes the Origin2000 System Different
- home memory
- Origin2000 Memory Hierarchy
- Hub ASIC
- Hub ASIC and Interfaces
- Hub
- Node Board
- I/O
- I/O Controllers
- interconnection fabric
- Overview of the Origin Family Architecture
- What Makes the Origin2000 System Different
- Interconnection Fabric
- maximum configuration
- Scalability and Modularity
- MediaIO board
- MediaIO (MIO) Board
- memory
- Memory
- hierarchy
- Origin2000 Memory Hierarchy
- Midplane board
- Midplane Board
- modularity
- Scalability and Modularity
- What Makes the Origin2000 System Different
- Overview of the Origin Family Architecture
- Node board
- Node Board
- Origin2000
- overview
- Origin2000
- page migration
- What Makes the Origin2000 System Different
- PCI bus
- I/O Controllers
- processing node
- Overview of the Origin Family Architecture
- R10000 processors
- Origin2000
- Processor
- registers
- Origin2000 Memory Hierarchy
- remote caches
- Origin2000 Memory Hierarchy
- Router ASIC
- Crossbar
- Router board
- Router Board
- scalability
- Overview of the Origin Family Architecture
- Scalability and Modularity
- What Makes the Origin2000 System Different
- snoopy-based coherence protocol
- What Makes the Origin2000 System Different
- system interconnections
- What Makes the Origin2000 System Different
- what the system consists of
- Overview of the Origin Family Architecture
- XIO boards
- Origin2000
- XIO interfaces
- XIO and Crossbow (XBOW)
- overview, of the Origin200 system
- Origin200
- overview, of the Origin2000 system
- Origin2000
- page fault in memory
- Hits, Misses, and Page Faults
- page migration
- Page Migration and Replication
- Origin2000 system
- What Makes the Origin2000 System Different
- page replication
- Page Migration and Replication
- page table
- as used in memory
- Virtual Memory
- page table entry (PTE)
- Virtual Memory
- pages
- as used in memory
- Memory Blocks, Lines, and Pages
- Distributed Shared-Memory
- parallel datapaths
- Overview of the Origin Family Architecture
- PCI expansion slots
- in the Origin200 system
- Origin200
- in the Origin2000 system
- I/O Controllers
- PCI protocol
- Origin Family ASICs
- peak bandwidth
- System Bandwidth
- System Bandwidth
- peripheral bandwidth
- System Bandwidth
- physical connections, Node board
- Node Board Physical Connections
- Poisoned
- directory state
- Directory States
- poisoning, directory
- Directory Poisoning
- processing node
- Overview of the Origin Family Architecture
- processor registers
- Origin2000 Memory Hierarchy
- processors
- Origin200 system
- Origin200
- Origin2000 system
- Origin2000
- protocol
- Crosstown
- XIO Devices — Widgets
- link level
- Link-Level Protocol (LLP)
- PCI
- Origin Family ASICs
- XIO
- XIO Protocol and Devices
- protocol, cache coherence
- Cache-Coherence Protocol
- directory entry
- Cache-Coherence Protocol
- Exclusive state
- Cache-Coherence Protocol
- Shared state
- Cache-Coherence Protocol
- protocol, directory
- Cache-Coherence Protocol
- Directory-Based Coherence
- protocol, snoopy
- Cache-Coherence Protocol
- Snoopy-Based Coherence
- PTE, page table entry
- Virtual Memory
- R10000 processors
- in the Origin2000 system
- Processor
- read cycle
- Sample Read Traversal of Memory
- registers
- in the Origin2000 system
- Origin2000 Memory Hierarchy
- remote caches
- in the Origin2000 system
- Origin2000 Memory Hierarchy
- memory hierarchy
- Origin2000 Memory Hierarchy
- remote memory
- Distributed Shared-Memory
- replication, page
- Page Migration and Replication
- Router ASIC
- Router ASIC
- Origin Family ASICs
- crossbar
- Router Crossbar
- Dynamically Allocated Memory Queue (DAMQ)
- Router Receiver and Sender
- link level protocol
- Link-Level Protocol (LLP)
- Origin2000 system
- Crossbar
- receiver
- Router Receiver and Sender
- routing table
- Routing Table
- sender
- Router Receiver and Sender
- source synchronous driver/receiver
- SSD/SSR
- Router board
- connectors
- Connectors
- CrayLink interconnections
- Connectors
- crossbar
- Router Board
- description
- Router Board
- Express Links
- Xpress Links
- Meta Router
- Types of Router Boards
- Null Router
- Types of Router Boards
- Standard Router
- Types of Router Boards
- Star Router
- Types of Router Boards
- routing table
- Router ASIC
- Routing Table
- S2MP architecture
- Overview of the Origin Family Architecture
- used for distributing memory
- Overview of the Origin Family Architecture
- scalability
- Overview of the Origin Family Architecture
- Origin2000 system
- Scalability and Modularity
- What Makes the Origin2000 System Different
- Scalable Shared-memory MultiProcessing architecture (S2MP)
- Overview of the Origin Family Architecture
- SDRAM
- Memory Specifications
- sequential consistency
- Memory Consistency
- SGI Transistor Logic (STL)
- SGI Transistor Logic (STL)
- Shared
- directory state
- Directory States
- Cache-Coherence Protocol
- snoopy-based coherence protocol
- Snoopy-Based Coherence
- Cache-Coherence Protocol
- in the Origin2000 system
- What Makes the Origin2000 System Different
- spatial locality
- Locality: Spatial and Temporal
- Standard Router
- Types of Router Boards
- Star Router
- Types of Router Boards
- state bits
- coherence
- Directory-Based Coherence
- STL, SGI Transistor Logic
- SGI Transistor Logic (STL)
- sustained bandwidth
- System Bandwidth
- System Bandwidth
- system latency
- System Latency
- temporal locality
- Locality: Spatial and Temporal
- TLB, translation lookaside buffer
- Virtual Memory
- Translation Lookaside Buffer
- translation lookaside buffer (TLB)
- Virtual Memory
- Translation Lookaside Buffer
- Unowned
- directory state
- Directory States
- virtual memory
- Virtual Memory
- widgets (XIO)
- XIO Devices — Widgets
- Crossbow ASIC
- Crossbow (XBOW) ASIC
- write cycle
- Sample Write Traversal of the Memory Hierarchy
- XIO
- Crossbow ASIC
- Crossbow Expansion
- distributed I/O
- Distributed I/O
- Origin2000 system
- XIO and Crossbow (XBOW)
- widgets
- XIO Devices — Widgets
- XIO boards
- in the Origin2000 system
- Origin2000
- XIO devices
- XIO Protocol and Devices
- XIO protocol
- XIO Protocol and Devices