Index

address space
cache algorithm bits
Virtual Address Space
physical
Physical Address Space
blocks
Physical Address Space
hub
Hub Physical Address Space
M Mode
Node Physical Address Space
node
Node Physical Address Space
pages
Physical Address Space
uncached attribute bits
Virtual Address Space
virtual
Virtual Address Space
virtual address bits
Virtual Address Space
xuseg
Virtual Address Space

architecture
distributed shared-memory
Virtual Address Space

Backdoor Directory (BDDir) space
Hub Special Space (HSpec)
addressing
Backdoor Directory (BDDir)
directory widths
Directory Widths
extended directory
Directory Widths
indexing a directory entry
Indexing a Directory Entry
page reference
Accessing the Regions, R[5:0]
protection
Accessing the Regions, R[5:0]
reads
BDDir Reads
regions, accessing
Accessing the Regions, R[5:0]
regular directory
Directory Widths
writes
BDDir Writes

Backdoor ECC (BDECC) space
Backdoor ECC (BDECC)
Hub Special Space (HSpec)
accessing
Backdoor ECC (BDECC)
reads
BDECC Reads
writes
BDECC Writes

blocks
Physical Address Space

BWin
Little Window (LWin) Map

cache algorithm bits
Virtual Address Space

cache, secondary, lines
Physical Address Space

Cached space
Cached Space (Cac)

Calias
Cached Space (Cac)

CALIAS_SIZE register
Cached Space (Cac)

CrayLink Interconnect
An Introduction to Origin Family

distributed shared-memory architecture
Virtual Address Space

Flash PROM
Flash PROM (FPROM)
Big Endian
Flash PROM (FPROM)
Little Endian
Flash PROM (FPROM)
reads
Flash PROM (FPROM)
Flash PROM (FPROM)
writes
Flash PROM (FPROM)

hub interfaces
CrayLink
Hub Local Register Regions
I/O interface
Hub Local Register Regions
memory/directory
Hub Local Register Regions
processor
Hub Local Register Regions

hub local register
Hub Local Register Regions
Accessing the Hub Local Registers

Hub Local Register Space
IAlias and Hub Spaces

Hub space
IAlias and Hub Spaces
IAlias and Hub Spaces
Little Window (LWin) Map
Hub Local Register Regions

Hub Special space
Hub Special Space (HSpec)

I/O space
Accessing I/O Space (IO)
BWin
Processor View of I/O Space
Accessing I/O Space (IO)
Little Window (LWin) Map
BWin map
Big Window (BWin[7:1]) Map
LWin
Little Window (LWin) Map
Accessing I/O Space (IO)
Processor View of I/O Space
processor view
Processor View of I/O Space
XIO view
XIO View of I/O Space

IAlias space
IAlias and Hub Spaces
IAlias and Hub Spaces
Little Window (LWin) Map
Hub Local Register Regions

index, NASID
Physical Address Space

interconnection fabric
An Introduction to Origin Family

interfaces, hub
Hub Local Register Regions

lines, secondary cache
Physical Address Space

Local Boot (LBoot) space
Hub Special Space (HSpec)
Local and Remote Boot Spaces (LBoot and RBoot)
with Flash PROM
Flash PROM (FPROM)

local register, hub
Hub Local Register Regions
Accessing the Hub Local Registers

LWin, widgets
Processor View of I/O Space
Little Window (LWin) Map

M Mode physical address space
Node Physical Address Space
M Mode Operations
Cached space
Cached Space (Cac)
M Mode Operations
Hub Special space
M Mode Operations
Hub Special Space (HSpec)
I/O space
XIO View of I/O Space
Processor View of I/O Space
Accessing I/O Space (IO)
M Mode Operations
Memory Special space
Memory Special Space (MSpec)
M Mode Operations
Uncached space
Uncached Space (Uncac)
M Mode Operations

Memory Special space
Memory Special Space (MSpec)

memory, main
page sizes
Physical Address Space

modularity, system
An Introduction to Origin Family

NASID
IAlias and Hub Spaces
index
Physical Address Space
offset bits
Physical Address Space
physical memory space
Physical Address Space

NUMA Address Space Identifier (NASID)
Physical Address Space

offset bits, NASID
Physical Address Space

Origin2000 system
maximum configuration
An Introduction to Origin Family
modules
An Introduction to Origin Family
nodes, where mounted
An Introduction to Origin Family
types
An Introduction to Origin Family

page sizes, in main memory
Physical Address Space

pages, description of
Physical Address Space

physical address space
Physical Address Space
blocks
Physical Address Space
hub
Hub Physical Address Space
M Mode
Node Physical Address Space
NASID
Physical Address Space
node
Node Physical Address Space
pages
Physical Address Space

PROM, Flash
Flash PROM (FPROM)

Remote Boot (RBoot) space
Hub Special Space (HSpec)
Local and Remote Boot Spaces (LBoot and RBoot)
with Flash PROM
Flash PROM (FPROM)

scalability, system
An Introduction to Origin Family

secondary cache lines
Physical Address Space

Uncached Alias (UAlias) space
Uncached Alias (Ualias)
Hub Special Space (HSpec)
access to
Uncached Alias (Ualias)
difference from Calias space
Uncached Alias (Ualias)
mapping
Uncached Alias (Ualias)
vector for error handler
Uncached Alias (Ualias)

Uncached Attribute bits
Virtual Address Space
Accessing I/O Space (IO)
in M Mode address space
M Mode Operations

Uncached space
Uncached Space (Uncac)

virtual address space
Virtual Address Space
address bits
Virtual Address Space
cache algorithm bits
Virtual Address Space
uncached attribute bits
Virtual Address Space
xuseg
Virtual Address Space

widgets
Processor View of I/O Space
IAlias and Hub Spaces
Hub space
IAlias and Hub Spaces
IAlias and Hub Spaces
Hub Local Register Regions
Little Window (LWin) Map
IAlias space
Little Window (LWin) Map
IAlias and Hub Spaces
IAlias and Hub Spaces
Hub Local Register Regions

XIO I/O view
address map
XIO IO View of Origin2000
XIO IO View of Origin2000
XIO IO View of Origin2000
Hub region, indexing
XIO IO View of Origin2000
system
XIO IO View of Origin2000

XIO memory view
address map
XIO Memory View
XIO Memory View
Hub
XIO Memory View

XIO view
of I/O
XIO IO View of Origin2000
of memory
XIO Memory View

xuseg space
Virtual Address Space