The IRIX operating system maps the virtual memory of a process into physical memory in chunks called pages. Whenever a process accesses its address space, the virtual memory address is translated to a physical memory address by the processor. The recently used translations are cached in a table inside the processor called the translation lookaside buffer (TLB).

Each TLB entry maps a page. The number of TLB entries for a processor is limited. If a translation is not found in the TLB, the processor raises a TLBMISS exception to the software. The number of TLBMISS exceptions a process can withstand depends upon its working set.

The working set is the range of address space the process needs to run. If the working set is large or if the process has a poor locality of reference, the process will incur more TLBMISS exceptions. Each TLBMISS exception has a small overhead and if a process has a lot of TLBMISS exceptions, the overhead can significantly affect the performance of the process.

Tools such as perfex(1) can be used to measure the number of TLB misses a process incurs during its run. The range of memory that can be mapped by a TLB depends on the page size. By increasing the page size, a larger range of memory can be mapped by the TLB. This results in a reduction in TLB misses and improves the performance of an application.

The policy module (PM) interface can be used to set a page size for an address range in the address space of a process. For more information on policy modules, see Chapter 1, “Using Memory Management Policy Modules”. The following example illustrates a how to set a page size for a piece of an address space of a process. The program sets a 64K page size to its text and it allocates a buffer in its BSS (that is, how much space the kernel should allocate for uninitialized data, historically called bss for “block started by symbol”). The program is as follows:

#define PAGE_SIZE       65536

#define BUFSIZE         6*PAGE_SIZE

char    buf[BUFSIZE];

policy_set_t policy = {
        PlacementDefault, (void *)1,
        FallbackLargepage, NULL,
        ReplicationDefault, NULL,
        MigrationDefault, NULL,
        PagingDefault, NULL,
        PAGE_SIZE
};


/*
 * Creates a PM with a particular page size and attaches it to a specific
 * address range.
 */

int
set_page_size(int size, char *vaddr, int len)
{
        pmo_handle_t    pm;

        /*
         * Set the page size.
         */
        policy.page_size = size;

        /*
         * Create a PM.
         */

        pm = pm_create( &policy);

        if ( pm < 0) {
                perror("pm_create");
                return -1;
        }

        /*
         * Attach the PM to the virtual address range.
         */
        if (pm_attach(pm, vaddr, len) < 0) {
                perror("pm_attach");
                return -1;
        }
        return 0;
}


main()
{
        extern  int     _ftext[];
        extern  int     etext[];
        int     len;
        char    *ftext;
        volatile char   *vaddr;

/*
         * Compute text start and length.
         */
        ftext = (char *)_ftext;
        ftext =  (char *)((long)ftext & (~(0x4000 -1)));
        len = ((char *)etext - ftext);

        /*
         * Set the page size as 64K for the process text and 
         * the buffer buf.
         */

        if (set_page_size(PAGE_SIZE, ftext, len) == -1) {
                exit(1);
        }

        if (set_page_size(PAGE_SIZE, buf, sizeof(buf)) == -1) {
                exit(1);
        }
}

The page sizes supported depends on the base page size of the system. The base page size can be obtained by using the getpagesize(2) system call. Currently, IRIX supports two page sizes, 16 KB and 4 KB.

On systems with 16K page size, the following page sizes are supported: 16 KB, 64 KB, 256 KB, 1 MB, 4 MB, and 16 MB.

On systems with 4K page size, the following page sizes are supported: 4 KB, 16 KB, 256 KB, 1 MB, 4 MB, and 16 MB.

In general, for most applications, 4 KB, 16 KB, and 64 KB page sizes are sufficient to eliminate TLBMISS overhead.

To adjust page sizes for your system adjust the following parameters:

If the kernel fails to allocate a large page for the process, it uses a page of the lowest page size. The same is true if the virtual address range is smaller than the page size. For the best performance, the starting virtual address should be aligned at 2*page_size boundary and should be of a length that is a multiple of 2*page_size. This is mostly due to the R4000 and R10000 processor limitations.